ICS2694 motherboard clock generator integrated circuit systems, inc. description the ICS2694 motherboard clock generator is an integrated circuit using pll and vco technology to generate virtually all the clock signals required in a pc. the use of the device can be generalized to satisfy the timing needs of most digital systems by reprogramming the vco or reconfiguring the counter stages which derive the output frequencies from the vcos. the primary vco is customarily used to generate the cpu clock and is so labeled on the ICS2694 . pre-programmed frequency sets are listed on page 6. these choices were made to match the major microprocessor families. cpusel (0-3) allow the user to select the appropriate frequency for the application. due to the filter in the phase-locked loop, the cpuclk will move in a linear fashion from one frequency to a newly- selected frequency without glitches. if a fixed cpuclk value is desired, cpusel (0-3) may be hard wired to the desired address with strobe tied high. (it has a pull-up.) for board test and debug, pulling outpute to ground will tristate all the outputs. features low cost - eliminates multiple oscillators and count down logic primary vco has 16 mask programmable frequencies (normally cpu clock) secondary vco has 1 mask programmable frequency (usually 96 mhz) pre-programmed versions for typical pc applications 10 outputs in addition to the primary cpu clock capability to reconfigure counter stages to change the frequencies of the outputs via mask options advanced pll design on-chip pll filters very flexible architecture out2 1 24 out3 out1 2 23 out4 out0 3 22 out5 out9 4 21 out6 cpuclk 5 20 out7 (cpuclk/2) vss 6 19 out8 dvdd 7 18 avdd strobe 8 17 xtal2 cpusel0 9 16 xtal1 cpusel1 10 15 avss cpusel2 11 14 outpute cpusel3 12 13 clkin 24-pin dip or soic ICS2694 pin configuration ICS2694reva1094 applications cpu clock and co-processor clock hard disk and floppy disk clock keyboard clock serial port clock bus clock system counting or timing functions
pin description pin number name description 1 out2 4ma output. 2 out1 4ma output. 3 out0 4ma output 4 out9 4ma output. 5 cpuclk 4ma output driven by voltage controlled oscillator 1 (vc01). vc01 is controlled by a 16 word rom. 6 vss ground for digital portion of chip. 7 dvdd plus supply for digital portion of chip. 8 strobe input control for transparent latches associated with cpu (0-3) which select one of 16 values for cpuclk. holding strobe high causes the latches to be transparent. 9 cpusel0 lsb cpuclk address bit. 10 cpusel1 cpuclk address bit. 11 cpusel2 cpuclk address bit. 12 cpusel3 msb cpuclk address bit. 13 clkin an alternative input for the reference clock. the crystal oscillator output and clkin are gated together to generate the reference clock for the vcos. if clkin is used, xtal1 should be held high and xtal2 left open. if the internal oscillator is used, hold clkin high. 14 outpute pulling this line low tristates all outputs. 15 avss ground for analog portion of chip. 16 xtal1 input of internal crystal oscillator stage. 17 xtal2 output of internal crystal oscillator stage. this pin should have nothing connected to it but one of the quartz crystal terminals. 18 avdd positive supply for analog portion of chip. 19 out8 4ma output. 20 out7 4ma output. (usually assigned as cpuclk/2 for co-processor use.) 21 out6 4ma output. 22 out5 4ma output. 23 out4 4ma output. 24 out3 4ma output. ICS2694 2
frequency reference the internal reference oscillator contains all of the passive components required. an appropriate series-resonant crystal should be connected between xtal1 (1) and xtal2 (2). in ibm-compatible applications, this will typically be a 14.31818 mhz crystal, but fundamental mode crystals be- tween 10 mhz and 25 mhz have been tested. maintain short lead lengths between the crystal and the ICS2694 . in order to optimize the quality of the quartz crystal oscillator, the input switching threshold of xtal1 is vdd/2 rather than the con- ventional 1.4v of ttl. there fore, xtal1 may not respond properly to a legal ttl signal since ttl is not required to exceed vdd/2. therefore, another clock input clkin (pin 13) has been added to the chip which is sized to have an input switching point of 1.4v. inside the chip, these two inputs are anded. therefore, when using the xtal1 and xtal2, clkin should be held high. (it has a pull-up.) when using clkin, xtal1 should be held high. (it does not have a pull-up because a pull-up would interfere with the oscillator bias.) it is anticipated that some applications will use both clock inputs, properly gated, for either board test or unique system functions. by generating all the system clocks from one refer- ence input, the phase and delay relationships between the various outputs will remain relatively fixed, thereby eliminat- ing problems arising from totally unsynchronized clocks inter- acting in a system. power supply conditioning the ICS2694 is a member of the second generation of dot clock products. by incorporating the loop filter on chip and upgrad- ing the vco, the ease of application has been substantially improved over earlier products. if a stable and noise-free power supply is available, no external components are required. how- ever, in some applications it may be judicious to decouple the power supply as shown in figures 1 or 2. figure 1 is the normal configuration for 5 volt only applications. which of the two provides superior performance depends on the noise content of the power supplies. in general, the configuration of figure 1 is satisfactory. figure 2 is the more conventional if a 12 volt analog supply is available, although the improved performance comes at a cost of an extra component; however, the cost of the discretes used in figure 1s are less than the cost of figure 1s discrete components. since the ICS2694 outputs a large number of high-frequency clocks, conservative design practices are recommended. care should be exercised in the board layout of supply and ground traces, and adequate power supply decoupling capacitors con- sistent with the application should be used. r1 33 +5 +5 dvdd vss, avss avdd c2 22v c1 c3 .1f .1f figure 1 d1 r1 470 +120 +50 dvdd vss, avss avdd 4.7v c1 c2 .1f .1f figure 2 ICS2694 3
absolute maximum ratings supply voltage . . . . . . . . . . . . . . . . v dd . . . . . . . . . . . . -0.5v to +7v input voltage . . . . . . . . . . . . . . . . . . v in . . . . . . . . . . . . -0.5v to vdd +0.5v output voltage . . . . . . . . . . . . . . . . vout. . . . . . . . . . -0.5v to vdd +0.5v clamp diode current . . . . . . . . . . . v ik & i ok . . . . . . . 30ma output current per pin . . . . . . . . . . i out . . . . . . . . . . . 50ma operating temperature . . . . . . . . . . t o . . . . . . . . . . . . . 0 c to + 150 c storage temperature . . . . . . . . . . . . t s . . . . . . . . . . . . . -85 c to + 150 c power dissipation . . . . . . . . . . . . . . p d . . . . . . . . . . . . . 500mw values beyond these ratings may damage the device. this device contains circuitry to protect the inputs and outputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid applications of any voltage higher than the maximum rated voltages. for proper operation, it is recommended that v in and v out be constrained to > = v ss and < = v dd . parameter symbol conditions min max units operating voltage range v dd 4.0 5.5 v input low voltage v il v dd = 5v vss 0.8 v input high voltage v ih v dd = 5v 2.0 v dd v input leakage current i ih v in = v cc -10 u a output low voltage v ol i ol = 4.0 ma - 0.4 v output high voltage v oh i oh = 4.0 ma 2.4 - v supply current i dd v dd = 5v, cpuclk = 80 mhz - 55 ma internal pull-up resistors r up *v dd = 5v, v in = 0v 50 - k ohm input pin capacitance c in f c = 1 mhz - 8 pf output pin capacitance c out f c = 1 mhz - 12 pf * the following inputs have pull-ups: outpute, strobe, cpusel (0-3), clkin. dc characteristics (0 c to 70 c) ICS2694 4
ac timing characteristics the following notes apply to all parameters presented in this section: 1. xtal frequency = 14.31818 mhz 2. all units are in nanoseconds (ns). 3. rise and fall time is between 0.8 and 2.0 vdc. 4. output pin loading = 15pf 5. duty cycle is measured at 1.4v. 6. supply voltage range = 4.5 to 5.5 volts 7. temperature range = 0 c to 70 c symbol parameter min max notes strobe timing tpw ts u thd strobe pulse width setup time data to strobe hold time data to strobe 20 10 10 - - - fout timing tr tf - - rise time fall time frequency error maximum frequency - - 3 3 0.5 135 duty cycle 40% min. to 60% max. at 80 mhz % mhz note : pattern -004 has rising edges of cpuclk and cpuclk/2 matched to 2 ns. strobe cpusel (0-3) tpw ts u t h d ICS2694 5
24-pin dip package ordering information ICS2694n-xxx example: ics xxxx m - xxx pattern number (2 or 3 digit number for parts with rom code patterns) package type n=dip ( plastic) device type (consists of 3 or 4 digit numbers) prefix ics, av=standard de vice; gsp=genlock device ICS2694 6
lead count 14l 16l 18l 20l 24l 28l 32l dimension l 0.354 0.404 0.454 0.504 0.604 0.704 0.804 soic packages ordering information ICS2694m-xxx example: ics xxxx m - xxx pattern number (2 or 3 digit number for parts with rom code patterns) package type m=soic device type (consists of 3 or 4 digit numbers) prefix ics, av=standard de vice; gsp=genlock device ICS2694 7
ICS2694 standard patterns cpusel0-3 (hex) cpuclk output (pin 5) (mhz) 02 110 220 324 425 532 6 33.33 740 848 950 10 54 11 66.67 12 68 13 80 14 100 15 16 note: pattern -004 has rising edges of cpuclk and cpuclk/2 matched to 2 ns. another alternative for cpu clock generation is the ics2494-244 if the additional functions of the ICS2694 are not needed in the application. ics part number ics2494- 244 address fs3-0 (hex) frequency (mhz) 020 124 232 340 450 566.6 680 7 100 854 970 090 b110 c25 d33.3 e40 f50 address ms1-0 (hex) frequency (mhz) 016 124 250 366.6 32 mhz 1 24 16 mhz 1 . 846 mhz 2 23 8 mhz 24 mhz 3 22 9.6 mhz 6 mhz 4 21 14.318 mhz cpuclk 5 20 cpuclk/2 vss 6 19 1.19 mhz dvdd 7 18 avdd strobe 8 17 xtal2 c pusel0 9 16 xtal1 c pusel1 10 15 avss c pusel2 11 14 outpute c pusel3 12 13 clkin ICS2694-004 ICS2694 8
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